Suggestions from Professor White

1.  There is a very real possibility that we will be online for some part of the semester.  In this case, I am looking at free, online FPGA simulators.  None I have found so far have an interactive "board" to manipulate and see outputs (e.g., LEDs, 7 segment displays, etc.).  That's unfortunate, but understandable.  I have found several other resources and examples though.  It would be nice if your students could produce a video of themselves doing each lab, at each step explaining WHAT they are doing and WHY it is necessary/important to the overall goal.  The video should conclude with a demo of interaction with the board where they systematically test all input combinations and the outputs, clearly explaining the inputs and expected outputs and circling back to the construction of the FPGA behavior.

2.  The ultimate goal for computer architecture in CSIS-220 is to understand how the processor works.  To do this, we look at a simplified design.  Below are some of the topics we cover.  It would be nice to experience more of these in the lab.  I don't have my textbook or any of my handwritten notes, so I am mostly going off of student handouts and the top of my head on this list.

• Logic gates:  AND, OR, NOT, XOR, NAND, NOR, XNOR (We do this with the basic circuits labs.)
• Universal gates (We do this with basic circuits labs.  Then, Matt has a FPGA lab on universal gates)
• Understand the function of a MUX.  Build a simple 1-bit ALU with a MUX with AND, OR, and SUM functions, including carry-in and carry-out.  Chain the 1-bit ALUs to make an n-bit ALU.
• Add to the 1-bit ALU the ability to do subtraction (using an inverter) and SLT (switch on less than) functionality.  So now, our MUX has AND, OR, ADD/SUB, SLT.
• Building the MUX with a decoder. (I think we do this with basic circuits.)
• Ripple carry adders (We do this with basic circuits.  Then, Matt has a FPGA lab on adder circuits)
• Carry look-ahead adders
• Understanding how to apply K-maps and encoders to control each segment of a 7-segment display.
• Latches & Flip-flops (S-R, D, J-K, T, gated, clocked, level triggered, edge triggered) and applications including register memory, data transfer, sequencers, and frequency dividers (We do some of this with basic circuits.  There is room for improvement.)
• Given a truth table or K-map of no more than 4 inputs, students should be able to determine the minterm or maxterm expression.  Using the expression, students should be able to create the same behavior on the FPGA.  (A lot of scaffolding would be needed to get students to this point in CSIS-220 since more lab time is dedicated to understanding assembly programming than understanding computer architecture).
• Applications (E.g., counters in different bases, 12-hour clock, finite state machines, etc.) & fun stuff